CVE-2022-49565

In the Linux kernel, the following vulnerability has been resolved:

perf/x86/intel/lbr: Fix unchecked MSR access error on HSW

The fuzzer triggers the below trace.

[ 7763.384369] unchecked MSR access error: WRMSR to 0x689 (tried to write 0x1fffffff8101349e) at rIP: 0xffffffff810704a4 (nativewritemsr+0x4/0x20) [ 7763.397420] Call Trace: [ 7763.399881] <TASK> [ 7763.401994] intelpmulbrrestore+0x9a/0x1f0 [ 7763.406363] intelpmulbrschedtask+0x91/0x1c0 [ 7763.410992] _perfeventtaskschedin+0x1cd/0x240

On a machine with the LBR format LBRFORMATEIPFLAGS2, when the TSX is disabled, a TSX quirk is required to access LBR from registers. The lbrfromsignextquirkneeded() is introduced to determine whether the TSX quirk should be applied. However, the lbrfromsignextquirkneeded() is invoked before the intelpmulbrinit(), which parses the LBR format information. Without the correct LBR format information, the TSX quirk never be applied.

Move the lbrfromsignextquirkneeded() into the intelpmulbrinit(). Checking x86pmu.lbrhastsx in the lbrfromsignextquirkneeded() is not required anymore.

Both LBRFORMATEIPFLAGS2 and LBRFORMATINFO have LBRTSX flag, but only the LBRFORMATEIP_FLAGS2 requirs the quirk. Update the comments accordingly.