CVE-2024-26762

In the Linux kernel, the following vulnerability has been resolved:

cxl/pci: Skip to handle RAS errors if CXL.mem device is detached

The PCI AER model is an awkward fit for CXL error handling. While the expectation is that a PCI device can escalate to link reset to recover from an AER event, the same reset on CXL amounts to a surprise memory hotplug of massive amounts of memory.

At present, the CXL error handler attempts some optimistic error handling to unbind the device from the cxl_mem driver after reaping some RAS register values. This results in a "hopeful" attempt to unplug the memory, but there is no guarantee that will succeed.

A subsequent AER notification after the memdev unbind event can no longer assume the registers are mapped. Check for memdev bind before reaping status register values to avoid crashes of the form:

BUG: unable to handle page fault for address: ffa00000195e9100 #PF: supervisor read access in kernel mode #PF: errorcode(0x0000) - not-present page [...] RIP: 0010:cxlhandleras+0x30/0x110 [cxlcore] [...] Call Trace: <TASK> ? _die+0x24/0x70 ? pagefaultoops+0x82/0x160 ? kernelmodefixuporoops+0x84/0x110 ? excpagefault+0x113/0x170 ? asmexcpagefault+0x26/0x30 ? _pfxdpcresetlink+0x10/0x10 ? _cxlhandleras+0x30/0x110 [cxlcore] ? findcxlport+0x59/0x80 [cxlcore] cxlhandlerpras+0xbc/0xd0 [cxlcore] cxlerrordetected+0x6c/0xf0 [cxlcore] reporterrordetected+0xc7/0x1c0 pciwalkbus+0x73/0x90 pciedo_recovery+0x23f/0x330

Longer term, the unbind and PCIERSRESULTDISCONNECT behavior might need to be replaced with a new PCIERSRESULTPANIC.