CVE-2024-42279
- Source
- https://cve.org/CVERecord?id=CVE-2024-42279
- Import Source
- https://storage.googleapis.com/osv-test-cve-osv-conversion/osv-output/CVE-2024-42279.json
- JSON Data
- https://api.test.osv.dev/v1/vulns/CVE-2024-42279
- Downstream
- Related
- Published
- 2024-08-17T09:08:46.829Z
- Modified
- 2026-03-20T12:38:45.758367Z
- Summary
- spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
- Details
-
In the Linux kernel, the following vulnerability has been resolved:
spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the start RX buffer. The core provides a register that will empty the RX and TX FIFOs, so do that before each transfer.
- Database specific
{ "osv_generated_from": "https://github.com/CVEProject/cvelistV5/tree/main/cves/2024/42xxx/CVE-2024-42279.json", "cna_assigner": "Linux" }- References
-
- https://git.kernel.org/stable/c/3feda3677e8bbe833c3a62a4091377a08f015b80
- https://git.kernel.org/stable/c/45e03d35229b680b79dfea1103a1f2f07d0b5d75
- https://git.kernel.org/stable/c/9cf71eb0faef4bff01df4264841b8465382d7927
- https://github.com/CVEProject/cvelistV5/tree/main/cves/2024/42xxx/CVE-2024-42279.json
- https://nvd.nist.gov/vuln/detail/CVE-2024-42279
- https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git